A serial peripheral interface (SPI) is an interface that enables the serial (one bit at a time) exchange of data between two devices, one called a master and the other called a slave. An SPI operates in full duplex mode. This means that data can be transferred in both directions at the same time.
More particularly, an SPI is a full-duplex synchronous serial interface for connecting low/medium-bandwidth external devices using four wires. SPIs communicate using a master/slave relationship over two data lines and two control lines.
DataIn: a first communication line that supplies output data from a master device to inputs of slave devices.
DataOut: a second communication line that supplies output data from a slave device to an input of the master device. It is important to note that there can be no more than one slave device that is transmitting data during any particular transfer.
CLK or Serial Clock: a first control line driven by the master device, regulating the flow of data bits.
CE_N or Slave Select: a second control line that allows slave devices to be turned on and off by the master with a hardware control.
In particular, the CE_N line corresponds to the case where a slave or peripheral device is selected.
From a hardware point of view it is based on four pins, corresponding to the above four wires or lines. These pins are mostly active-low.
In particular, in an unselected state, the DataOut lines are in a high-impedance (hi-Z) condition, and are therefore inactive. The master device decides with which slave or peripheral device it wants to communicate.
The clock line CLK is brought to the slave device whether it is selected or not. The clock line serves as a synchronization of the data communication.
A dedicated communication protocol is designed to communicate with an SPI. The SPI is most often employed in systems for communication between the central processing unit (CPU) and peripheral devices. It is also possible to connect two microprocessors by an SPI.
Many types of devices can be controlled by an SPI, including shift registers, memory chips, port expanders, display drivers, data converters, printers, data storage devices, sensors and microprocessors. Data is transferred serially over a cable, input to a shift register, and transferred within each subsystem by parallel processing.
The main characteristics of the applications of SPIs are as follows: high speed, high board density and low cost. So, the SPI is advantageously used in the fields related to computers, consumer applications and automotive among many industrial applications.
It also known that serial interfaces have certain advantages over parallel interfaces. The most significant advantage is simpler wiring. In addition, serial interface cables can be longer than parallel interface cables because there is much less interaction (crosstalk) among the conductors in the cable.
Moreover, the high-speed serial SPI is preferred over parallel interfaces in applications where speed, board density and low costs are crucial. So, SPIs are widely used in computer applications including printers, hard disks, and motherboards; consumer applications including TVs, Set-Top Boxes, and DVDs; automotive applications including airbags, ABS, ESP, and car audio; and industrial applications including alarms, motor control, and instruments.
In general, peripheral devices using SPIs can be subdivided into the following categories: converters (ADC and DAC); memories (EEPROM and FLASH); real time clocks (RTC); sensors (temperature, pressure) and other (signal mixer, potentiometer, LCD controller, UART, CAN controller, USB controller, amplifier).
It should be noted that memory devices using SPIs are mostly EEPROM devices. The use of Flash memories is also possible.
The SPI is also simpler than a parallel interface, for example to connect a Flash memory to a microcontroller or an ASIC equipped with a serial bus. Serial buses are input/output interfaces supporting a mixed address/data protocol. The serial bus connectivity reduces the number of interface signals required.
In fact, the 4 signals required from SPI (data in, data out, clock and chip select) compared to 21 signals necessary to interface a 10-bit address parallel memory are advantageous because they are cheaper and less complex. As a result, the number of pins of the memory package (memory and bus master) is reduced.
Consequently, an SPI interface to memory can fit into a smaller and less expensive package. However, serial Flash memories are available in lower densities than Flash memories equipped with a parallel interface. The communication throughput between serial a Flash memory and a master processor is lower than Flash memories equipped with a parallel interface.
Consequently, the time to download code into the serial Flash memory and execute it is longer. As a result, serial Flash memories are usually used for small code storage associated with a cache RAM. The executable code is first programmed in the memory and write protected. After power-up, it is downloaded from memory to RAM from where it is executed by a master processor.
Also, even though Flash memories are far simpler than EEPROM memories from a structural point of view, with some advantages in terms of occupied silicon area and costs, in Flash memories it is quite expensive to program several memory words at a time in terms of dissipated power.
Such known memory devices have a capacity range from a few Kbits up to 64 MBit and clock frequencies up to 40 MHz. In such memories, page mode programming is generally performed by storing all words in the SRAM and by reading then the content thereof for each single word. If this content is different from FF (in a Flash memory bits with a logic value 1 indicate an erased cell), it will be stored in the corresponding word of the matrix sector page.
In particular, to perform a writing operation in a Flash memory, it is necessary to remove first the protection against writing of the matrix sector to be programmed, by addressing a convenient protection register. Afterwards, it is necessary to give a writing command, which will be decoded by a specific unit in charge thereof (usually indicate ad Command User Interface). This command serves to enable an internal programming algorithm and to pass then the matrix address and the datum or data to be programmed.
These three steps can be implemented according to the SPI protocol controlled by a state machine. Taking into account that a FLASH memory can program one byte at a time, to implement the page programming it is evidently necessary to store in a convenient structure the sequences of data to be programmed.
The simplest way for implementing the page programming is to use a buffer memory bank of the SRAM type (Static Random Access Memory). Obviously, such a memory bank is too complex for the task it has to perform. For example, it is not useful to have a random access to the memory, which involves the use of a row and column decoding circuitry, if in the end a following-address programming is performed on a FLASH memory.
In summary, the memory devices using SPIs which are known in the art have the following drawbacks: low density memory capacities, slow erase and slow page program.